160 lines
4.4 KiB
Rust
160 lines
4.4 KiB
Rust
//! SPI Commands for the Waveshare 7.5" E-Ink Display
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use crate::traits;
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/// EPD7in5 commands
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///
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/// Should rarely (never?) be needed directly.
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///
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/// For more infos about the addresses and what they are doing look into the PDFs.
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#[allow(dead_code)]
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#[allow(non_camel_case_types)]
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#[derive(Copy, Clone)]
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pub(crate) enum Command {
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DriverOutputControl = 0x01,
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/// Set gate driving voltage
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GateDrivingVoltageControl = 0x03,
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/// Set source driving voltage
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SourceDrivingVoltageControl = 0x04,
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SoftStart = 0x0C,
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/// Set the scanning start position of the gate driver.
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/// The valid range is from 0 to 679.
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GateScanStartPosition = 0x0F,
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/// Deep sleep mode control
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DeepSleep = 0x10,
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/// Define data entry sequence
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DataEntry = 0x11,
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/// resets the commands and parameters to their S/W Reset default values except R10h-Deep Sleep Mode.
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/// During operation, BUSY pad will output high.
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/// Note: RAM are unaffected by this command.
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SwReset = 0x12,
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/// After this command initiated, HV Ready detection starts.
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/// BUSY pad will output high during detection.
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/// The detection result can be read from the Status Bit Read (Command 0x2F).
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HvReadyDetection = 0x14,
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/// After this command initiated, VCI detection starts.
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/// BUSY pad will output high during detection.
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/// The detection result can be read from the Status Bit Read (Command 0x2F).
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VciDetection = 0x15,
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/// Temperature Sensor Selection
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TemperatureSensorControl = 0x18,
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/// Write to temperature register
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TemperatureSensorWrite = 0x1A,
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/// Read from temperature register
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TemperatureSensorRead = 0x1B,
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/// Write Command to External temperature sensor.
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TemperatureSensorWriteExternal = 0x1C,
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/// Activate Display Update Sequence
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MasterActivation = 0x20,
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/// RAM content option for Display Update
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DisplayUpdateControl1 = 0x21,
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/// Display Update Sequence Option
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DisplayUpdateControl2 = 0x22,
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/// After this command, data entries will be written into the BW RAM until another command is written
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WriteRamBw = 0x24,
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/// After this command, data entries will be written into the RED RAM until another command is written
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WriteRamRed = 0x26,
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/// Fetch data from RAM
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ReadRam = 0x27,
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/// Enter VCOM sensing conditions
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VcomSense = 0x28,
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/// Enter VCOM sensing conditions
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VcomSenseDuration = 0x29,
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/// Program VCOM register into OTP
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VcomProgramOtp = 0x2A,
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/// Reduces a glitch when ACVCOM is toggled
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VcomControl = 0x2B,
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/// Write VCOM register from MCU interface
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VcomWrite = 0x2C,
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/// Read Register for Display Option
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OtpRead = 0x2D,
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/// CRC calculation command for OTP content validation
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CrcCalculation = 0x34,
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/// CRC Status Read
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CrcRead = 0x35,
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/// Program OTP Selection according to the OTP Selection Control
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ProgramSelection = 0x36,
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/// Write Register for Display Option
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DisplayOptionWrite = 0x37,
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/// Write register for User ID
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UserIdWrite = 0x38,
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/// Select border waveform for VBD
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VbdControl = 0x3C,
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/// Read RAM Option
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ReadRamOption = 0x41,
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/// Specify the start/end positions of the window address in the X direction by an address unit for RAM
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SetRamXStartEnd = 0x44,
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/// Specify the start/end positions of the window address in the Y direction by an address unit for RAM
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SetRamYStartEnd = 0x45,
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/// Auto write RED RAM for regular pattern
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AutoWriteRed = 0x46,
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/// Auto write B/W RAM for regular pattern
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AutoWriteBw = 0x47,
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/// Make initial settings for the RAM X address in the address counter (AC)
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SetRamXAc = 0x4E,
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/// Make initial settings for the RAM Y address in the address counter (AC)
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SetRamYAc = 0x4F,
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/// This command is an empty command; it does not have any effect on the display module.
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/// However, it can be used to terminate Frame Memory Write or Read Commands.
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Nop = 0x7F,
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}
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impl traits::Command for Command {
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/// Returns the address of the command
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fn address(self) -> u8 {
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self as u8
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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use crate::traits::Command as CommandTrait;
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#[test]
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fn command_addr() {
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assert_eq!(Command::MasterActivation.address(), 0x20);
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assert_eq!(Command::SwReset.address(), 0x12);
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assert_eq!(Command::DisplayUpdateControl2.address(), 0x22);
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}
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}
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