diff --git a/README.md b/README.md
index a353f99..c8b7c7a 100644
--- a/README.md
+++ b/README.md
@@ -1,2 +1,35 @@
 # eink-waveshare-rs
 IN WORK! Drivers for various EPDs from Waveshare. Currently only support for the 4.2 Black/White one
+
+Be careful with the partial updates!
+It was only tested in a mBED implementation, this one wasn't tested yet!!!
+
+## TODO's
+
+- [ ] add some basic buffer drawing abilities
+- [ ] test Embedded Linux (rpi) example
+- [ ] test f3 example
+- [ ] improve the partial drawing/check the timings/timing improvements/....
+- [ ] for later: add support or the smaller waveshare epds
+
+
+## Drawing
+
+### With a Buffer
+
+Is still missing at the moment. 
+
+### Without a Buffer
+
+Maybe add support for Non-Buffer drawing from the https://crates.io/crates/embedded-graphics Crate later on.
+
+
+## Examples
+
+There are some examples in the examples folder.
+
+But be careful, I haven't found the time to actually test the examples yet and the pins are just choosen randomly atm.
+So thats something that needs to be done first.
+
+
+## Documenation
diff --git a/examples/embedded_linux/Cargo.toml b/examples/embedded_linux/Cargo.toml
new file mode 100644
index 0000000..5566b89
--- /dev/null
+++ b/examples/embedded_linux/Cargo.toml
@@ -0,0 +1,12 @@
+[package]
+name = "embedded_linux"
+version = "0.1.0"
+authors = ["Christoph Groß <christoph.gross@student.uni-tuebingen.de>"]
+
+[dependencies]
+
+eink_waveshare_rs = { git = "https://github.com/Caemor/eink-waveshare-rs"}
+
+linux-embedded-hal = "0.1.1"
+
+embedded-hal = { version = "0.1.2", features = ["unproven"] }
diff --git a/examples/embedded_linux/src/main.rs b/examples/embedded_linux/src/main.rs
new file mode 100644
index 0000000..4ef2114
--- /dev/null
+++ b/examples/embedded_linux/src/main.rs
@@ -0,0 +1,111 @@
+// the library for the embedded linux device
+extern crate linux_embedded_hal as lin_hal;
+
+// the eink library
+extern crate eink_waveshare_rs;
+
+
+use eink_waveshare_rs::{epd4in2::EPD4in2};
+
+use lin_hal::spidev::{self, SpidevOptions};
+use lin_hal::{Pin, Spidev};
+use lin_hal::sysfs_gpio::Direction;
+use lin_hal::Delay;
+
+
+
+
+// DigitalIn Hack as long as it's not in the linux_embedded_hal
+// from https://github.com/rudihorn/max31865/blob/extra_examples/examples/rpi.rs
+extern crate embedded_hal;
+use embedded_hal::digital::{InputPin, OutputPin};
+
+struct HackInputPin<'a> {
+    pin: &'a OutputPin
+}
+
+impl<'a> HackInputPin<'a> {
+    fn new(p : &'a OutputPin) -> HackInputPin {
+        HackInputPin {
+            pin: p
+        }
+    }
+}
+
+impl<'a> InputPin for HackInputPin<'a> {
+    fn is_low(&self) -> bool {
+        self.pin.is_low()
+    }
+
+    fn is_high(&self) -> bool {
+        self.pin.is_high()
+    }
+}
+
+
+/*
+*
+* BE CAREFUL: this wasn't tested yet, and the pins are also not choosen correctly (just some random ones atm)
+*
+*/
+
+fn main() {
+
+    // Configure SPI
+    let mut spi = Spidev::open("/dev/spidev0.0").unwrap();
+    let options = SpidevOptions::new()
+        .bits_per_word(8)
+        .max_speed_hz(1_000_000)
+        .mode(spidev::SPI_MODE_0)
+        .build();
+    spi.configure(&options).unwrap();
+
+    // Configure Digital I/O Pin to be used as Chip Select for SPI
+    let cs = Pin::new(23);
+    cs.export().unwrap();
+    while !cs.is_exported() {}
+    cs.set_direction(Direction::Out).unwrap();
+    cs.set_value(1).unwrap();
+
+    let busy = Pin::new(26);
+    busy.export().unwrap();
+    while !busy.is_exported() {}
+    busy.set_direction(Direction::In).unwrap();
+    busy.set_value(1).unwrap();
+    let busy_in = HackInputPin::new(&busy);
+
+    let dc = Pin::new(27);
+    dc.export().unwrap();
+    while !dc.is_exported() {}
+    dc.set_direction(Direction::Out).unwrap();
+    dc.set_value(1).unwrap();
+
+    let rst = Pin::new(28);
+    rst.export().unwrap();
+    while !rst.is_exported() {}
+    rst.set_direction(Direction::Out).unwrap();
+    rst.set_value(1).unwrap();   
+
+    let delay = Delay {};
+
+
+ 
+    
+
+    //TODO: wait for Digital::InputPin
+    //fixed currently with the HackInputPin, see further above
+    let mut epd4in2 = EPD4in2::new(spi, cs, busy_in, dc, rst, delay).unwrap();
+
+    //let mut buffer =  [0u8, epd4in2.get_width() / 8 * epd4in2.get_height()];
+    let mut buffer = [0u8; 15000];
+    // draw something into the buffer
+    buffer[0] = 0xFF;
+ 
+    epd4in2.display_and_transfer_frame(&buffer, None).unwrap();
+ 
+    epd4in2.delay_ms(3000);
+
+    epd4in2.clear_frame(None).unwrap();
+
+    epd4in2.sleep().unwrap();
+}
diff --git a/examples/f3_stm32f30x/Cargo.toml b/examples/f3_stm32f30x/Cargo.toml
new file mode 100644
index 0000000..e371a8b
--- /dev/null
+++ b/examples/f3_stm32f30x/Cargo.toml
@@ -0,0 +1,24 @@
+[package]
+name = "f3_stm32f30x"
+version = "0.1.0"
+authors = ["Christoph Groß <christoph.gross@student.uni-tuebingen.de>"]
+
+[dependencies]
+f3 = "0.5.3"
+cortex-m = {version = "0.4.3"}
+
+eink_waveshare_rs = { git = "https://github.com/Caemor/eink-waveshare-rs"}
+
+# only temporary until Digital::InputPin has arrived in f3
+embedded-hal = { version = "0.1.2", features = ["unproven"] }
+
+# for #no_std
+panic-abort = "0.1.1"
+
+# for handling 'language item required, but not found: 'eh_personality' in #no_std
+# see https://os.phil-opp.com/freestanding-rust-binary/ for more infos
+[profile.dev]
+panic = "abort"
+
+[profile.release]
+panic = "abort"
\ No newline at end of file
diff --git a/examples/f3_stm32f30x/src/main.rs b/examples/f3_stm32f30x/src/main.rs
new file mode 100644
index 0000000..464cf2f
--- /dev/null
+++ b/examples/f3_stm32f30x/src/main.rs
@@ -0,0 +1,118 @@
+#![deny(unsafe_code)]
+#![no_std]
+ 
+
+extern crate cortex_m;
+
+extern crate f3;
+
+extern crate eink_waveshare_rs;
+
+extern crate embedded_hal as hal;
+
+// For handling 'language item required, but not found: panic_fmt' in #no_std
+// see https://os.phil-opp.com/freestanding-rust-binary/ for more infos
+extern crate panic_abort;
+ 
+
+use f3::hal::prelude::*;
+use f3::hal::stm32f30x;
+use f3::hal::spi::Spi;
+use f3::hal::delay::Delay;
+use eink_waveshare_rs::{epd4in2::EPD4in2, SPI_MODE};
+
+use hal::digital::{InputPin, OutputPin};
+
+
+//from https://github.com/rudihorn/max31865/tree/extra_examples/examples
+struct HackInputPin<'a> {
+    pin: &'a OutputPin
+}
+
+impl<'a> HackInputPin<'a> {
+    fn new(p : &'a OutputPin) -> HackInputPin {
+        HackInputPin {
+            pin: p
+        }
+    }
+}
+
+impl<'a> InputPin for HackInputPin<'a> {
+    fn is_low(&self) -> bool {
+        self.pin.is_low()
+    }
+
+    fn is_high(&self) -> bool {
+        self.pin.is_high()
+    }
+}
+
+/*
+*
+* BE CAREFUL: this wasn't tested yet, and the pins are also not choosen correctly (just some random ones atm)
+*
+*/
+
+fn main() {
+    let cp = cortex_m::Peripherals::take().unwrap();
+    let p = stm32f30x::Peripherals::take().unwrap();
+
+    let mut flash = p.FLASH.constrain();
+    let mut rcc = p.RCC.constrain();
+ 
+    // TRY the other clock configuration
+    let clocks = rcc.cfgr.freeze(&mut flash.acr);
+    // let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(&mut flash.acr);
+ 
+    let mut gpioa = p.GPIOA.split(&mut rcc.ahb);
+    let mut gpioe = p.GPIOE.split(&mut rcc.ahb);
+ 
+    let mut cs = gpioe
+        .pe3
+        .into_push_pull_output(&mut gpioe.moder, &mut gpioe.otyper);
+    cs.set_high();
+
+    //TODO: Fix when f3::hal includes Digital::InputPin
+    //using the hack from rudihorn that Digital::OutputPin basically
+    //contains the needed functions for Digital::InputPin
+    let busy = gpioe.pe4.into_push_pull_output(&mut gpioe.moder, &mut gpioe.otyper);
+    let busy_in = HackInputPin::new(&busy);
+
+    let dc = gpioe.pe5.into_push_pull_output(&mut gpioe.moder, &mut gpioe.otyper);
+    let rst = gpioe.pe6.into_push_pull_output(&mut gpioe.moder, &mut gpioe.otyper);
+    let delay = Delay::new(cp.SYST, clocks);
+
+
+ 
+    // The `L3gd20` abstraction exposed by the `f3` crate requires a specific pin configuration to
+    // be used and won't accept any configuration other than the one used here. Trying to use a
+    // different pin configuration will result in a compiler error.
+    let sck = gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl);
+    let miso = gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl);
+    let mosi = gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl);
+ 
+    let spi = Spi::spi1(
+        p.SPI1,
+        (sck, miso, mosi),
+        SPI_MODE,
+        2.mhz(),
+        clocks,
+        &mut rcc.apb2,
+    );
+
+    //TODO wait for f3::hal update to include Digital::InputPin
+    let mut epd4in2 = EPD4in2::new(spi, cs, busy_in, dc, rst, delay).unwrap();
+
+    //let mut buffer =  [0u8, epd4in2.get_width() / 8 * epd4in2.get_height()];
+    let mut buffer = [0u8; 15000];
+    // draw something into the buffer
+    buffer[0] = 0xFF;
+ 
+    epd4in2.display_and_transfer_frame(&buffer, None).unwrap();
+ 
+    epd4in2.delay_ms(3000);
+   
+    epd4in2.clear_frame(None).unwrap();
+
+    epd4in2.sleep().unwrap();
+}
diff --git a/src/lib.rs b/src/lib.rs
index 9df51fe..9fb03b3 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -46,6 +46,8 @@
 //! 
 //! 
 //! 
+//! BE CAREFUL! The Partial Drawing can "destroy" your display.
+//! It needs more testing first.
 #![no_std]