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Removed #[allow(non_camel_case_types)] to fix issues

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This commit is contained in:
Caemor
2021-04-11 20:31:24 +02:00
parent 0567da80c0
commit ba1b90e2f3
21 changed files with 593 additions and 611 deletions
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src/epd2in13_v2/command.rs
+54 -59
View File
@@ -9,51 +9,50 @@ use bit_field::BitField;
///
/// For more infos about the addresses and what they are doing look into the pdfs
#[allow(dead_code)]
#[allow(non_camel_case_types)]
#[derive(Copy, Clone)]
pub(crate) enum Command {
DRIVER_OUTPUT_CONTROL = 0x01,
GATE_DRIVING_VOLTAGE_CTRL = 0x03,
SOURCE_DRIVING_VOLTAGE_CTRL = 0x04,
BOOSTER_SOFT_START_CONTROL = 0x0C,
GATE_SCAN_START_POSITION = 0x0F,
DEEP_SLEEP_MODE = 0x10,
DATA_ENTRY_MODE_SETTING = 0x11,
SW_RESET = 0x12,
HV_READY_DETECTION = 0x14,
VCI_DETECTION = 0x15,
TEMPERATURE_SENSOR_CONTROL_WRITE = 0x1A,
TEMPERATURE_SENSOR_CONTROL_READ = 0x1B,
TEMPERATURE_SENSOR_EXT_CONTROL_WRITE = 0x1C,
MASTER_ACTIVATION = 0x20,
DISPLAY_UPDATE_CONTROL_1 = 0x21,
DISPLAY_UPDATE_CONTROL_2 = 0x22,
WRITE_RAM = 0x24,
WRITE_RAM_RED = 0x26,
READ_RAM = 0x27,
VCOM_SENSE = 0x28,
VCOM_SENSE_DURATION = 0x29,
PROGRAM_VCOM_OPT = 0x2A,
WRITE_VCOM_REGISTER = 0x2C,
OTP_REGISTER_READ = 0x2D,
STATUS_BIT_READ = 0x2F,
PROGRAM_WS_OTP = 0x30,
LOAD_WS_OTP = 0x31,
WRITE_LUT_REGISTER = 0x32,
PROGRAM_OTP_SELECTION = 0x36,
WRITE_OTP_SELECTION = 0x37,
SET_DUMMY_LINE_PERIOD = 0x3A,
SET_GATE_LINE_WIDTH = 0x3B,
BORDER_WAVEFORM_CONTROL = 0x3C,
READ_RAM_OPTION = 0x41,
SET_RAM_X_ADDRESS_START_END_POSITION = 0x44,
SET_RAM_Y_ADDRESS_START_END_POSITION = 0x45,
AUTO_WRITE_RED_RAM_REGULAR_PATTERN = 0x46,
AUTO_WRITE_BW_RAM_REGULAR_PATTERN = 0x47,
SET_RAM_X_ADDRESS_COUNTER = 0x4E,
SET_RAM_Y_ADDRESS_COUNTER = 0x4F,
SET_ANALOG_BLOCK_CONTROL = 0x74,
SET_DIGITAL_BLOCK_CONTROL = 0x7E,
DriverOutputControl = 0x01,
GateDrivingVoltageCtrl = 0x03,
SourceDrivingVoltageCtrl = 0x04,
BoosterSoftStartControl = 0x0C,
GateScanStartPosition = 0x0F,
DeepSleepMode = 0x10,
DataEntryModeSetting = 0x11,
SwReset = 0x12,
HvReadyDetection = 0x14,
VciDetection = 0x15,
TemperatureSensorControlWrite = 0x1A,
TemperatureSensorControlRead = 0x1B,
TemperatureSensorExtControlWrite = 0x1C,
MasterActivation = 0x20,
DisplayUpdateControl1 = 0x21,
DisplayUpdateControl2 = 0x22,
WriteRam = 0x24,
WriteRamRed = 0x26,
ReadRam = 0x27,
VcomSense = 0x28,
VcomSenseDuration = 0x29,
ProgramVcomOpt = 0x2A,
WriteVcomRegister = 0x2C,
OtpRegisterRead = 0x2D,
StatusBitRead = 0x2F,
ProgramWsOtp = 0x30,
LoadWsOtp = 0x31,
WriteLutRegister = 0x32,
ProgramOtpSelection = 0x36,
WriteOtpSelection = 0x37,
SetDummyLinePeriod = 0x3A,
SetGateLineWidth = 0x3B,
BorderWaveformControl = 0x3C,
ReadRamOption = 0x41,
SetRamXAddressStartEndPosition = 0x44,
SetRamYAddressStartEndPosition = 0x45,
AutoWriteRedRamRegularPattern = 0x46,
AutoWriteBwRamRegularPattern = 0x47,
SetRamXAddressCounter = 0x4E,
SetRamYAddressCounter = 0x4F,
SetAnalogBlockControl = 0x74,
SetDigitalBlockControl = 0x7E,
NOP = 0x7F,
}
@@ -135,32 +134,30 @@ impl DisplayUpdateControl2 {
}
#[allow(dead_code)]
#[allow(non_camel_case_types)]
pub(crate) enum DataEntryModeIncr {
X_DECR_Y_DECR = 0x0,
X_INCR_Y_DECR = 0x1,
X_DECR_Y_INCR = 0x2,
X_INCR_Y_INCR = 0x3,
XDecrYDecr = 0x0,
XIncrYDecr = 0x1,
XDecrYIncr = 0x2,
XIncrYIncr = 0x3,
}
#[allow(dead_code)]
#[allow(non_camel_case_types)]
pub(crate) enum DataEntryModeDir {
X_DIR = 0x0,
Y_DIR = 0x4,
XDir = 0x0,
YDir = 0x4,
}
#[allow(dead_code)]
#[allow(non_camel_case_types)]
#[derive(Copy, Clone)]
pub(crate) enum BorderWaveFormVBD {
GS = 0x0,
FIX_LEVEL = 0x1,
FixLevel = 0x1,
VCOM = 0x2,
}
#[allow(dead_code)]
#[allow(non_camel_case_types)]
#[derive(Copy, Clone)]
pub(crate) enum BorderWaveFormFixLevel {
VSS = 0x0,
@@ -170,7 +167,6 @@ pub(crate) enum BorderWaveFormFixLevel {
}
#[allow(dead_code)]
#[allow(non_camel_case_types)]
#[derive(Copy, Clone)]
pub(crate) enum BorderWaveFormGS {
LUT0 = 0x0,
@@ -194,17 +190,16 @@ impl BorderWaveForm {
}
#[allow(dead_code)]
#[allow(non_camel_case_types)]
#[derive(Copy, Clone)]
pub enum DeepSleepMode {
// Sleeps and keeps access to RAM and controller
NORMAL = 0x00,
Normal = 0x00,
// Sleeps without access to RAM/controller but keeps RAM content
MODE_1 = 0x01,
Mode1 = 0x01,
// Same as MODE_1 but RAM content is not kept
MODE_2 = 0x11,
Mode2 = 0x11,
}
pub(crate) struct GateDrivingVoltage(pub u8);
src/epd2in13_v2/mod.rs
+30 -34
View File
@@ -80,7 +80,7 @@ where
self.set_lut(spi, Some(self.refresh))?;
// Python code does this, not sure why
// self.cmd_with_data(spi, Command::WRITE_OTP_SELECTION, &[0, 0, 0, 0, 0x40, 0, 0])?;
// self.cmd_with_data(spi, Command::WriteOtpSelection, &[0, 0, 0, 0, 0x40, 0, 0])?;
// During partial update, clock/analog are not disabled between 2
// updates.
@@ -88,7 +88,7 @@ where
spi,
DisplayUpdateControl2::new().enable_analog().enable_clock(),
)?;
self.command(spi, Command::MASTER_ACTIVATION)?;
self.command(spi, Command::MasterActivation)?;
self.wait_until_idle();
self.set_border_waveform(
@@ -101,7 +101,7 @@ where
)?;
} else {
self.wait_until_idle();
self.command(spi, Command::SW_RESET)?;
self.command(spi, Command::SwReset)?;
self.wait_until_idle();
self.set_driver_output(
@@ -118,11 +118,7 @@ where
self.set_dummy_line_period(spi, 0x30)?;
self.set_gate_scan_start_position(spi, 0)?;
self.set_data_entry_mode(
spi,
DataEntryModeIncr::X_INCR_Y_INCR,
DataEntryModeDir::X_DIR,
)?;
self.set_data_entry_mode(spi, DataEntryModeIncr::XIncrYIncr, DataEntryModeDir::XDir)?;
// Use simple X/Y auto increase
self.set_ram_area(spi, 0, 0, WIDTH - 1, HEIGHT - 1)?;
@@ -177,7 +173,7 @@ where
) -> Result<Self, SPI::Error> {
let mut epd = EPD2in13 {
interface: DisplayInterface::new(cs, busy, dc, rst),
sleep_mode: DeepSleepMode::MODE_1,
sleep_mode: DeepSleepMode::Mode1,
background_color: DEFAULT_BACKGROUND_COLOR,
refresh: RefreshLUT::FULL,
};
@@ -206,7 +202,7 @@ where
.disable_analog()
.disable_clock(),
)?;
self.command(spi, Command::MASTER_ACTIVATION)?;
self.command(spi, Command::MasterActivation)?;
self.set_sleep_mode(spi, self.sleep_mode)?;
Ok(())
@@ -217,14 +213,14 @@ where
self.set_ram_area(spi, 0, 0, WIDTH - 1, HEIGHT - 1)?;
self.set_ram_address_counters(spi, 0, 0)?;
self.cmd_with_data(spi, Command::WRITE_RAM, buffer)?;
self.cmd_with_data(spi, Command::WriteRam, buffer)?;
if self.refresh == RefreshLUT::FULL {
// Always keep the base buffer equal to current if not doing partial refresh.
self.set_ram_area(spi, 0, 0, WIDTH - 1, HEIGHT - 1)?;
self.set_ram_address_counters(spi, 0, 0)?;
self.cmd_with_data(spi, Command::WRITE_RAM_RED, buffer)?;
self.cmd_with_data(spi, Command::WriteRamRed, buffer)?;
}
Ok(())
}
@@ -254,14 +250,14 @@ where
self.set_ram_area(spi, x, y, x + width, y + height)?;
self.set_ram_address_counters(spi, x, y)?;
self.cmd_with_data(spi, Command::WRITE_RAM, buffer)?;
self.cmd_with_data(spi, Command::WriteRam, buffer)?;
if self.refresh == RefreshLUT::FULL {
// Always keep the base buffer equals to current if not doing partial refresh.
self.set_ram_area(spi, x, y, x + width, y + height)?;
self.set_ram_address_counters(spi, x, y)?;
self.cmd_with_data(spi, Command::WRITE_RAM_RED, buffer)?;
self.cmd_with_data(spi, Command::WriteRamRed, buffer)?;
}
Ok(())
@@ -283,7 +279,7 @@ where
} else {
self.set_display_update_control_2(spi, DisplayUpdateControl2::new().display())?;
}
self.command(spi, Command::MASTER_ACTIVATION)?;
self.command(spi, Command::MasterActivation)?;
self.wait_until_idle();
Ok(())
@@ -305,7 +301,7 @@ where
self.set_ram_area(spi, 0, 0, WIDTH - 1, HEIGHT - 1)?;
self.set_ram_address_counters(spi, 0, 0)?;
self.command(spi, Command::WRITE_RAM)?;
self.command(spi, Command::WriteRam)?;
self.interface.data_x_times(
spi,
color,
@@ -317,7 +313,7 @@ where
self.set_ram_area(spi, 0, 0, WIDTH - 1, HEIGHT - 1)?;
self.set_ram_address_counters(spi, 0, 0)?;
self.command(spi, Command::WRITE_RAM_RED)?;
self.command(spi, Command::WriteRamRed)?;
self.interface.data_x_times(
spi,
color,
@@ -353,7 +349,7 @@ where
Some(RefreshLUT::QUICK) => &LUT_PARTIAL_UPDATE,
};
self.cmd_with_data(spi, Command::WRITE_LUT_REGISTER, buffer)
self.cmd_with_data(spi, Command::WriteLutRegister, buffer)
}
fn is_busy(&self) -> bool {
@@ -380,7 +376,7 @@ where
self.set_ram_area(spi, 0, 0, WIDTH - 1, HEIGHT - 1)?;
self.set_ram_address_counters(spi, 0, 0)?;
self.cmd_with_data(spi, Command::WRITE_RAM_RED, buffer)?;
self.cmd_with_data(spi, Command::WriteRamRed, buffer)?;
Ok(())
}
@@ -412,7 +408,7 @@ where
assert!(start <= 295);
self.cmd_with_data(
spi,
Command::GATE_SCAN_START_POSITION,
Command::GateScanStartPosition,
&[(start & 0xFF) as u8, ((start >> 8) & 0x1) as u8],
)
}
@@ -424,13 +420,13 @@ where
) -> Result<(), SPI::Error> {
self.cmd_with_data(
spi,
Command::BORDER_WAVEFORM_CONTROL,
Command::BorderWaveformControl,
&[borderwaveform.to_u8()],
)
}
fn set_vcom_register(&mut self, spi: &mut SPI, vcom: VCOM) -> Result<(), SPI::Error> {
self.cmd_with_data(spi, Command::WRITE_VCOM_REGISTER, &[vcom.0])
self.cmd_with_data(spi, Command::WriteVcomRegister, &[vcom.0])
}
fn set_gate_driving_voltage(
@@ -438,7 +434,7 @@ where
spi: &mut SPI,
voltage: GateDrivingVoltage,
) -> Result<(), SPI::Error> {
self.cmd_with_data(spi, Command::GATE_DRIVING_VOLTAGE_CTRL, &[voltage.0])
self.cmd_with_data(spi, Command::GateDrivingVoltageCtrl, &[voltage.0])
}
fn set_dummy_line_period(
@@ -447,11 +443,11 @@ where
number_of_lines: u8,
) -> Result<(), SPI::Error> {
assert!(number_of_lines <= 127);
self.cmd_with_data(spi, Command::SET_DUMMY_LINE_PERIOD, &[number_of_lines])
self.cmd_with_data(spi, Command::SetDummyLinePeriod, &[number_of_lines])
}
fn set_gate_line_width(&mut self, spi: &mut SPI, width: u8) -> Result<(), SPI::Error> {
self.cmd_with_data(spi, Command::SET_GATE_LINE_WIDTH, &[width & 0x0F])
self.cmd_with_data(spi, Command::SetGateLineWidth, &[width & 0x0F])
}
/// Sets the source driving voltage value
@@ -464,7 +460,7 @@ where
) -> Result<(), SPI::Error> {
self.cmd_with_data(
spi,
Command::SOURCE_DRIVING_VOLTAGE_CTRL,
Command::SourceDrivingVoltageCtrl,
&[vsh1.0, vsh2.0, vsl.0],
)
}
@@ -476,16 +472,16 @@ where
spi: &mut SPI,
value: DisplayUpdateControl2,
) -> Result<(), SPI::Error> {
self.cmd_with_data(spi, Command::DISPLAY_UPDATE_CONTROL_2, &[value.0])
self.cmd_with_data(spi, Command::DisplayUpdateControl2, &[value.0])
}
/// Triggers the deep sleep mode
fn set_sleep_mode(&mut self, spi: &mut SPI, mode: DeepSleepMode) -> Result<(), SPI::Error> {
self.cmd_with_data(spi, Command::DEEP_SLEEP_MODE, &[mode as u8])
self.cmd_with_data(spi, Command::DeepSleepMode, &[mode as u8])
}
fn set_driver_output(&mut self, spi: &mut SPI, output: DriverOutput) -> Result<(), SPI::Error> {
self.cmd_with_data(spi, Command::DRIVER_OUTPUT_CONTROL, &output.to_bytes())
self.cmd_with_data(spi, Command::DriverOutputControl, &output.to_bytes())
}
/// Sets the data entry mode (ie. how X and Y positions changes when writing
@@ -497,7 +493,7 @@ where
counter_direction: DataEntryModeDir,
) -> Result<(), SPI::Error> {
let mode = counter_incr_mode as u8 | counter_direction as u8;
self.cmd_with_data(spi, Command::DATA_ENTRY_MODE_SETTING, &[mode])
self.cmd_with_data(spi, Command::DataEntryModeSetting, &[mode])
}
/// Sets both X and Y pixels ranges
@@ -511,13 +507,13 @@ where
) -> Result<(), SPI::Error> {
self.cmd_with_data(
spi,
Command::SET_RAM_X_ADDRESS_START_END_POSITION,
Command::SetRamXAddressStartEndPosition,
&[(start_x >> 3) as u8, (end_x >> 3) as u8],
)?;
self.cmd_with_data(
spi,
Command::SET_RAM_Y_ADDRESS_START_END_POSITION,
Command::SetRamYAddressStartEndPosition,
&[
start_y as u8,
(start_y >> 8) as u8,
@@ -535,11 +531,11 @@ where
y: u32,
) -> Result<(), SPI::Error> {
self.wait_until_idle();
self.cmd_with_data(spi, Command::SET_RAM_X_ADDRESS_COUNTER, &[(x >> 3) as u8])?;
self.cmd_with_data(spi, Command::SetRamXAddressCounter, &[(x >> 3) as u8])?;
self.cmd_with_data(
spi,
Command::SET_RAM_Y_ADDRESS_COUNTER,
Command::SetRamYAddressCounter,
&[y as u8, (y >> 8) as u8],
)?;
Ok(())