mirror of
https://github.com/Anshorei/epd-waveshare.git
synced 2026-10-04 06:16:42 +00:00
Merge branch 'fix-70' of https://github.com/olback/epd-waveshare into olback-fix-70
This commit is contained in:
+33
-29
@@ -31,11 +31,11 @@
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//! .draw(&mut display);
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//!
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//!// Display updated frame
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//!epd.update_frame(&mut spi, &display.buffer())?;
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//!epd.display_frame(&mut spi)?;
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//!epd.update_frame(&mut spi, &display.buffer(), &mut delay)?;
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//!epd.display_frame(&mut spi, &mut delay)?;
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//!
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//!// Set the EPD to sleep
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//!epd.sleep(&mut spi)?;
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//!epd.sleep(&mut spi, &mut delay)?;
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//!# Ok(())
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//!# }
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//!```
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@@ -71,29 +71,25 @@ mod graphics;
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pub use crate::epd1in54::graphics::Display1in54;
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/// Epd1in54 driver
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///
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pub struct Epd1in54<SPI, CS, BUSY, DC, RST> {
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pub struct Epd1in54<SPI, CS, BUSY, DC, RST, DELAY> {
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/// SPI
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interface: DisplayInterface<SPI, CS, BUSY, DC, RST>,
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interface: DisplayInterface<SPI, CS, BUSY, DC, RST, DELAY>,
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/// Color
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background_color: Color,
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/// Refresh LUT
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refresh: RefreshLut,
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}
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impl<SPI, CS, BUSY, DC, RST> Epd1in54<SPI, CS, BUSY, DC, RST>
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impl<SPI, CS, BUSY, DC, RST, DELAY> Epd1in54<SPI, CS, BUSY, DC, RST, DELAY>
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where
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SPI: Write<u8>,
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CS: OutputPin,
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BUSY: InputPin,
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DC: OutputPin,
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RST: OutputPin,
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DELAY: DelayMs<u8>,
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{
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fn init<DELAY: DelayMs<u8>>(
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&mut self,
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spi: &mut SPI,
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delay: &mut DELAY,
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) -> Result<(), SPI::Error> {
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fn init(&mut self, spi: &mut SPI, delay: &mut DELAY) -> Result<(), SPI::Error> {
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self.interface.reset(delay, 10);
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// 3 Databytes:
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@@ -139,14 +135,15 @@ where
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}
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}
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impl<SPI, CS, BUSY, DC, RST, E> WaveshareDisplay<SPI, CS, BUSY, DC, RST>
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for Epd1in54<SPI, CS, BUSY, DC, RST>
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impl<SPI, CS, BUSY, DC, RST, E, DELAY> WaveshareDisplay<SPI, CS, BUSY, DC, RST, DELAY>
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for Epd1in54<SPI, CS, BUSY, DC, RST, DELAY>
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where
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SPI: Write<u8, Error = E>,
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CS: OutputPin,
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BUSY: InputPin,
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DC: OutputPin,
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RST: OutputPin,
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DELAY: DelayMs<u8>,
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{
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type DisplayColor = Color;
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fn width(&self) -> u32 {
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@@ -157,7 +154,7 @@ where
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HEIGHT
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}
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fn new<DELAY: DelayMs<u8>>(
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fn new(
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spi: &mut SPI,
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cs: CS,
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busy: BUSY,
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@@ -178,15 +175,11 @@ where
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Ok(epd)
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}
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fn wake_up<DELAY: DelayMs<u8>>(
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&mut self,
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spi: &mut SPI,
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delay: &mut DELAY,
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) -> Result<(), SPI::Error> {
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fn wake_up(&mut self, spi: &mut SPI, delay: &mut DELAY) -> Result<(), SPI::Error> {
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self.init(spi, delay)
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}
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fn sleep(&mut self, spi: &mut SPI) -> Result<(), SPI::Error> {
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fn sleep(&mut self, spi: &mut SPI, _delay: &mut DELAY) -> Result<(), SPI::Error> {
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self.wait_until_idle();
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// 0x00 for Normal mode (Power on Reset), 0x01 for Deep Sleep Mode
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//TODO: is 0x00 needed here or would 0x01 be even more efficient?
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@@ -195,7 +188,12 @@ where
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Ok(())
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}
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fn update_frame(&mut self, spi: &mut SPI, buffer: &[u8]) -> Result<(), SPI::Error> {
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fn update_frame(
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&mut self,
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spi: &mut SPI,
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buffer: &[u8],
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_delay: &mut DELAY,
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) -> Result<(), SPI::Error> {
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self.wait_until_idle();
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self.use_full_frame(spi)?;
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self.interface
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@@ -222,7 +220,7 @@ where
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Ok(())
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}
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fn display_frame(&mut self, spi: &mut SPI) -> Result<(), SPI::Error> {
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fn display_frame(&mut self, spi: &mut SPI, _delay: &mut DELAY) -> Result<(), SPI::Error> {
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self.wait_until_idle();
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// enable clock signal, enable cp, display pattern -> 0xC4 (tested with the arduino version)
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//TODO: test control_1 or control_2 with default value 0xFF (from the datasheet)
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@@ -236,13 +234,18 @@ where
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Ok(())
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}
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fn update_and_display_frame(&mut self, spi: &mut SPI, buffer: &[u8]) -> Result<(), SPI::Error> {
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self.update_frame(spi, buffer)?;
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self.display_frame(spi)?;
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fn update_and_display_frame(
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&mut self,
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spi: &mut SPI,
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buffer: &[u8],
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delay: &mut DELAY,
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) -> Result<(), SPI::Error> {
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self.update_frame(spi, buffer, delay)?;
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self.display_frame(spi, delay)?;
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Ok(())
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}
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fn clear_frame(&mut self, spi: &mut SPI) -> Result<(), SPI::Error> {
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fn clear_frame(&mut self, spi: &mut SPI, _delay: &mut DELAY) -> Result<(), SPI::Error> {
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self.wait_until_idle();
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self.use_full_frame(spi)?;
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@@ -282,16 +285,17 @@ where
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}
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}
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impl<SPI, CS, BUSY, DC, RST> Epd1in54<SPI, CS, BUSY, DC, RST>
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impl<SPI, CS, BUSY, DC, RST, DELAY> Epd1in54<SPI, CS, BUSY, DC, RST, DELAY>
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where
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SPI: Write<u8>,
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CS: OutputPin,
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BUSY: InputPin,
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DC: OutputPin,
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RST: OutputPin,
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DELAY: DelayMs<u8>,
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{
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fn wait_until_idle(&mut self) {
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self.interface.wait_until_idle(IS_BUSY_LOW);
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let _ = self.interface.wait_until_idle(IS_BUSY_LOW);
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}
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pub(crate) fn use_full_frame(&mut self, spi: &mut SPI) -> Result<(), SPI::Error> {
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